A high‐linearity Ka‐band CMOS down‐conversion mixer. Issue 12 (23rd July 2020) - Byeon, Chul Woo; Lee, Sang Ho; Lee, Jeong Ho; Son, Ju Ho
Abstract: This article presents a high‐linearity Ka ‐band complementary metal–oxide–semiconductor (CMOS) down‐conversion mixer. The mixer comprises an RF transconductance stage, switching stage, local oscillator buffer, and intermediate frequency (IF) buffer, and employs modified multiple gate transistors for high linearity. The intermodulation and gain characteristics are analyzed, revealing that the proposed IF buffer can enhance the linearity performance without a gain reduction. Implemented in 65‐nm CMOS technology, the proposed mixer consumes 23 mW and occupies a core chip area of 0.54 mm 2 . The mixer achieves a conversion gain of 9.3 to 11.1 dB, a noise figure of 8.4 to 9.2 dB, and an output third‐order intercept point of 15.6 to 23.6 dBm at an RF frequency of 37 to 41 GHz.