Thermal Stress Analysis of Chip Scale Packaging by Using Novel Multiscale Interface Element Method. (21st October 2018)

• Record Type: Journal Article
• Authors: Liu, D. S.; Chen, Y. W.; Tsai, C. Y.
• Other Names: Mahomed Fazal M. Academic Editor.
• Is Part Of: Mathematical problems in engineering. Volume 2018(2018)
• Publication Date: 2018-10-21
• Subjects: Engineering mathematics -- Periodicals; 510.2462
• DOI: 10.1155/2018/4962498
• Languages: English
• ISSNs: 1024-123X

Abstract

Abstract : In this study, a multiscale interface element method (MIEM) is developed to evaluate the interfacial peel and shear stress distributions in multilayer packaging structures. A newly developed polygon interface element contained many sides that could easily connect with many other polygon elements of much smaller scale. Simple model and less computation can obtain accurate stress distributions. After verification of the validity of the developed model, MIEM is applied to analyze thermal stress distribution of the chip scale package (CSP). In general, a good qualitative agreement has been observed between the various results. Moreover, MIEM can directly obtain the stress value at the interface, which is also one of the advantages of this method in dealing with multilayer structures.