Computer and Hardware Modeling of Periodically Forced ϕ6-Van der Pol Oscillator. (15th December 2016)

• Record Type: Journal Article
• Authors: Adelakun, A. O.; Njah, A. N.; Olusola, O. I.; Wara, S. T.
• Other Names: Horng Jiun-Wei Academic Editor.
• Is Part Of: Active and passive electronic components. Volume 2016(2016)
• Publication Date: 2016-12-15
• Subjects: Electronics -- Periodicals; Passive components -- Periodicals; Electronic apparatus and appliances -- Periodicals; 621.381505
• DOI: 10.1155/2016/3426713
• Languages: English
• ISSNs: 0882-7516

Abstract

Abstract : Numerical simulation results for the dynamics of ϕ 6 -systems abound in the literature but their experimental results are yet to be known. This paper presents the chaotic dynamics of ϕ 6 -Van der Pol oscillator via electronic design, simulation, and hardware implementation. The results obtained are found to be in good agreement with numerical simulation results. The condition for stability of the fixed points is also computed and the method of multiple time scale is used to investigate the dynamical behaviour of the system. Therefore, the ϕ 6 -circuits which have rich dynamics and may have important applications in secure communications, random number generations, cryptography, and so forth have been practically implemented.