An efficient DC‐DC converter for inductive power transfer in low‐power sensor applications. (29th April 2022)

• Record Type: Journal Article
• Authors: Lu, Ruikuan; Hossain, Md. Kamal; Alexander, J. Iwan; Massoud, Yehia; Haider, Mohammad R.
• Is Part Of: International journal of circuit theory and applications. Volume 50:Number 8(2022)
• Page Start: 2887
• Page End: 2899
• Publication Date: 2022-04-29
• Subjects: complementary topology -- conversion efficiency -- DC–DC converter -- effective resistance -- ripple voltage -- switched‐capacitor -- switching frequency; Electric circuit analysis -- Periodicals; 621.319205
• DOI: 10.1002/cta.3285
• Languages: English
• ISSNs: 0098-9886

Abstract

Summary: Inductive power transfer has become an emerging technology for its significant benefits in many applications, including mobile phones, laptops, electric vehicles, implanted bio‐sensors, and internet of things (IoT) devices. In modern applications, a direct current–direct current (DC–DC) converter is one of the essential components to regulate the output supply voltage for achieving the desired characteristics, that is, steady voltage with lower peak ripples. This paper presents a switched‐capacitor (SC) DC–DC converter using complementary architecture to provide a regulated DC voltage with an increased dynamic response. The proposed topology enhances the converter efficiency by decreasing the equivalent output resistance to half by connecting two symmetric SC single ladder converters. The proposed converter is designed using the standard 130‐nm BiCMOS process. The results show that the proposed architecture produces 327‐mV DC output with a rise time of 60.1 ns and consumes 3.449‐nW power for 1.0‐V DC supply. The output settling time is 43.6% lower than the single‐stage SC DC–DC converter with an input frequency of 200 MHz. The comparison results show that the proposed converter has a higher power conversion efficiency of 93.87 % and a lower power density of 0.57 mW/mm 2 compared to the existing works. Abstract : This paper presents a switched‐capacitor DC–DC converter using complementary architecture to provide a regulated DC voltage with an increased dynamic response. The proposed architecture produces 327‐mV DC output with a rise time of 60.1 ns and consumes 3.449‐nW power for 1.0‐V DC supply. The output settling time is 43.6% lower than the single‐stage switched‐capacitor DC–DC converter at 200‐MHz switching frequency. It has a higher power conversion efficiency of 93.87% and a lower power density of 0.57 mW/mm 2 .