A new extraction flow of the small‐signal switch‐HEMT model based on the parasitic resistance scanning algorithm. Issue 9 (8th June 2022)
- Record Type:
- Journal Article
- Title:
- A new extraction flow of the small‐signal switch‐HEMT model based on the parasitic resistance scanning algorithm. Issue 9 (8th June 2022)
- Main Title:
- A new extraction flow of the small‐signal switch‐HEMT model based on the parasitic resistance scanning algorithm
- Authors:
- Popov, Artem Aleksandrovich
Dobush, Igor Miroslavovich
Salnikov, Andrei Sergeyevich - Abstract:
- Abstract: Recent research interest in switch High Electron Mobility Transistor (HEMT) modeling revealed the special modeling requirement that is a parasitic capacitance shell surrounding the equivalent circuit. Despite the robust determination of parasitic capacitances, one still may face several problems when extracting a small‐signal switch‐HEMT model. Practical switch‐HEMT test structures include different configurations of gate network with additional microstrip lines, large‐value resistors, and via‐holes. Ignoring parts of these networks results in unfavorable errors when comparing measured and simulated results. Another problem may arise when extracting the switch‐HEMT equivalent circuit parameters from the measured S ‐parameters of the grounded gate test structures: obtained parasitic resistances can be exaggerated, resulting in negative values of intrinsic channel resistance (conductance). This paper presents a new switch‐HEMT extraction flow intended to address the mentioned challenges. To eliminate an excessive gate inductance attributed to via‐hole, we introduce a concept of the gate network de‐embedding. A negative channel resistance (conductance) problem is handled by applying a new parasitic resistance scanning algorithm that allows finding the model parameter vector with reasonable positive values in the vicinity of the S ‐parameters modeling error minimum. Accurate S ‐parameters modeling results verify the proposed extraction flow. Obtained small‐signalAbstract: Recent research interest in switch High Electron Mobility Transistor (HEMT) modeling revealed the special modeling requirement that is a parasitic capacitance shell surrounding the equivalent circuit. Despite the robust determination of parasitic capacitances, one still may face several problems when extracting a small‐signal switch‐HEMT model. Practical switch‐HEMT test structures include different configurations of gate network with additional microstrip lines, large‐value resistors, and via‐holes. Ignoring parts of these networks results in unfavorable errors when comparing measured and simulated results. Another problem may arise when extracting the switch‐HEMT equivalent circuit parameters from the measured S ‐parameters of the grounded gate test structures: obtained parasitic resistances can be exaggerated, resulting in negative values of intrinsic channel resistance (conductance). This paper presents a new switch‐HEMT extraction flow intended to address the mentioned challenges. To eliminate an excessive gate inductance attributed to via‐hole, we introduce a concept of the gate network de‐embedding. A negative channel resistance (conductance) problem is handled by applying a new parasitic resistance scanning algorithm that allows finding the model parameter vector with reasonable positive values in the vicinity of the S ‐parameters modeling error minimum. Accurate S ‐parameters modeling results verify the proposed extraction flow. Obtained small‐signal switch‐HEMT models are validated by designing and manufacturing a 2 dB digital step attenuator section. … (more)
- Is Part Of:
- International journal of RF and microwave computer-aided engineering. Volume 32:Issue 9(2022)
- Journal:
- International journal of RF and microwave computer-aided engineering
- Issue:
- Volume 32:Issue 9(2022)
- Issue Display:
- Volume 32, Issue 9 (2022)
- Year:
- 2022
- Volume:
- 32
- Issue:
- 9
- Issue Sort Value:
- 2022-0032-0009-0000
- Page Start:
- n/a
- Page End:
- n/a
- Publication Date:
- 2022-06-08
- Subjects:
- microwave switch -- parasitic resistance scanning -- small‐signal model -- switch‐HEMT
Microwave devices -- Computer-aided design -- Periodicals
Computer-aided engineering -- Periodicals
621.3813 - Journal URLs:
- http://onlinelibrary.wiley.com/journal/10.1002/(ISSN)1099-047X ↗
https://www.hindawi.com/journals/ijmce ↗
http://onlinelibrary.wiley.com/ ↗ - DOI:
- 10.1002/mmce.23278 ↗
- Languages:
- English
- ISSNs:
- 1096-4290
- Deposit Type:
- Legaldeposit
- View Content:
- Available online (eLD content is only available in our Reading Rooms) ↗
- Physical Locations:
- British Library DSC - 4542.538150
British Library DSC - BLDSS-3PM
British Library HMNTS - ELD Digital store - Ingest File:
- 22784.xml