Editors' Choice—Epitaxial CVD Growth of Ultra-Thin Si Passivation Layers on Strained Ge Fin Structures. (1st January 2018)

• Record Type: Journal Article
• Authors: Loo, R.; Arimura, H.; Cott, D.; Witters, L.; Pourtois, G.; Schulze, A.; Douhard, B.; Vanherle, W.; Eneman, G.; Richard, O.; Favia, P.; Mitard, J.; Mocuta, D.; Langer, R.; Collaert, N.
• Is Part Of: ECS journal of solid state science and technology. Volume 7:Number 2(2018)
• Page Start: P66
• Page End: P72
• Publication Date: 2018-01-01
• Subjects: CVD -- Si passivation -- strained Ge; Solid state chemistry -- Periodicals; Electronics -- Materials -- Periodicals; Electrochemistry -- Periodicals; 541.0421
• DOI: 10.1149/2.0191802jss
• Languages: English
• ISSNs: 2162-8777

Abstract

Abstract : Epitaxially grown ultra-thin Si layers are often used to passivate Ge surfaces in the high-k gate module of (strained) Ge FinFET and Gate All Around devices. We use Si4 H10 as Si precursor as it enables epitaxial Si growth at temperatures down to 330°C. C-V characteristics of blanket capacitors made on Ge virtual substrates point to the presence of an optimal Si thickness. In case of compressively strained Ge fin structures, the Si growth results in non-uniform and high strain levels in the strained Ge fin. These strain levels have been calculated for different shapes of the Ge fin and in function of the grown Si thickness. The high strain is the driving force for potential (unwanted) Ge surface reflow during Si deposition. The Ge surface reflow is strongly affected by the strength of the H-passivation during Si-capping and can be avoided by carefully selected process conditions.