97.6% array area reduction, ReRAM computation-in-memory with hyperparameter optimization based on memory bit-error rate and bit precision of log-encoding simulated annealing. (1st May 2022)

• Record Type: Journal Article
• Authors: Misawa, Naoko; Taoka, Kenta; Matsui, Chihiro; Takeuchi, Ken
• Is Part Of: Japanese journal of applied physics. Volume 61:Number SC(2022)
• Publication Date: 2022-05-01
• Subjects: ReRAM -- computation-in-memory -- simulated annealing -- combinatorial optimization problems; Physics -- Periodicals; 621.05
• DOI: 10.35848/1347-4065/ac356f
• Languages: English
• ISSNs: 0021-4922

Abstract

Abstract: This paper proposes small array area and memory error tolerant resistive random access memory (ReRAM) computation-in-memory (CiM) with hyperparameter optimization based on bit-error rate (BER) and bit precision of log-encoding simulated annealing (SA). For combinatorial optimization problems, the proposed ReRAM CiM with log-encoding SA reduces the array area by 97.6%, compared with the conventional linear-encoding. To analyze ReRAM device error characteristics, "0" and "1" error injection is applied. The asymmetric ReRAM error improves the acceptable BER by 10 times and the acceptable bit precision to 4 bit. By adjusting the random flips and a cooling parameter, the numbers of flips and iterations decrease by 40% and 33%, respectively. Error injected (EI) iteration is changed to reproduce bit-error due to read disturb. The delay of EI iteration increases the acceptable BER by 25%. Furthermore, in the case of requiring extremely high accuracy, hyperparameter optimization improves the probability of obtaining the optimal answer by 1%.