SRS-based Timepix3 readout system. (1st April 2022)

• Record Type: Journal Article
• Authors: Gruber, M.; Desch, K.; Hemperek, T.; Kaminski, J.; Richarz, L.; Schiffer, T.
• Is Part Of: Journal of instrumentation. Volume 17:Number 4(2022)
• Publication Date: 2022-04-01
• Subjects: CMOS readout of gaseous detectors -- Data acquisition concepts -- Modular electronics; Scientific apparatus and instruments -- Periodicals; 502.84
• DOI: 10.1088/1748-0221/17/04/C04015
• Languages: English
• ISSNs: 1748-0221

Abstract

Abstract: With the combination of the highly granular pixel ASIC Timepix3 by the Medipix3 collaboration and several technologies we are developing a range of detectors. These technologies are bump bonded sensors, microchannel plates (MCP) and photolithographically postprocessed gas amplification stages (InGrid). For example, we are using the combination of the ASIC and an InGrid for the development of X-ray detectors for X-ray polarimetry and for axion search at IAXO. Based on the combination of the ASIC and silicon sensors we are developing a tracker or respectively a beam telescope. The combination of the ASIC and a microchannel plate will be used for neutron detectors. As this range of detectors has several requirements towards the readout and control system and a wide range of designs from low- to high-rate (Hz to MHz) and from single- to multichip, a versatile readout system is needed which adapts these applications without producing too much overhead for the others. To fulfil these requirements, we are developing a modular and scalable readout and control system based on the basil framework — a modular data acquisition system and system testing framework. The fully open-source implementation uses Verilog for the firmware and Python for the software. The system supports several FPGA boards to offer different applications a range of capabilities. One of these FPGA boards is the Scalable Readout System (SRS) by RD51 which offers scalability in low to medium rate applications. For high-rate applications we are working towards the firmware implementation on Xilinx adaptive compute acceleration platform. Besides the scalability, the system offers an optional monitoring interface via a microcontroller for monitoring chip temperatures and power supply voltages. Additionally, further external sensors could be connected to the monitoring system for example via I 2 C or SPI. For controlling the full system, the software offers a command line interface and a graphical user interface. Both interfaces also include an online event display to monitor the raw data. Additional meta data and data of the monitoring system is stored in a database and can be visualised with a monitoring dashboard.