Quantization, training, parasitic resistance correction, and programming techniques of memristor-crossbar neural networks for edge intelligence. Issue 3 (1st September 2022)

• Record Type: Journal Article
• Authors: Nguyen, Tien Van; An, Jiyong; Oh, Seokjin; Truong, Son Ngoc; Min, Kyeong-Sik
• Is Part Of: Neuromorphic computing and engineering. Volume 2:Issue 3(2022)
• Publication Date: 2022-09-01
• Subjects: memristor crossbars -- neural networks -- edge intelligence -- quantization -- training -- parasitic resistance correction; Neural networks (Computer science) -- Periodicals; Neural computers -- Periodicals; Neuromorphics -- Periodicals; 006.3
• DOI: 10.1088/2634-4386/ac781a
• Languages: English
• ISSNs: 2634-4386

Abstract

Abstract: In the internet-of-things era, edge intelligence is critical for overcoming the communication and computing energy crisis, which is unavoidable if cloud computing is used exclusively. Memristor crossbars with in-memory computing may be suitable for realizing edge intelligence hardware. They can perform both memory and computing functions, allowing for the development of low-power computing architectures that go beyond the von Neumann computer. For implementing edge-intelligence hardware with memristor crossbars, in this paper, we review various techniques such as quantization, training, parasitic resistance correction, and low-power crossbar programming, and so on. In particular, memristor crossbars can be considered to realize quantized neural networks with binary and ternary synapses. For preventing memristor defects from degrading edge intelligence performance, chip-in-the-loop training can be useful when training memristor crossbars. Another undesirable effect in memristor crossbars is parasitic resistances such as source, line, and neuron resistance, which worsens as crossbar size increases. Various circuit and software techniques can compensate for parasitic resistances like source, line, and neuron resistance. Finally, we discuss an energy-efficient programming method for updating synaptic weights in memristor crossbars, which is needed for learning the edge devices.