Application of new algorithms on asymmetric cascaded multilevel inverter. Issue 4 (23rd July 2020)

• Record Type: Journal Article
• Authors: Yahya, Ashraf; Ali, Syed M. Usman; Khan, Muhammad Farhan
• Is Part Of: Compel. Volume 39:Issue 4(2020)
• Page Start: 943
• Page End: 958
• Publication Date: 2020-07-23
• Subjects: Electric converters -- Circuit analysis -- Multilevel inverter -- Asymmetric -- Cascaded -- Switch variety -- MLI algorithms; Electrical engineering -- Data Processing -- Periodicals; Electrical engineering -- Mathematics -- Periodicals; Electrical engineering -- Periodicals; Electronics -- Data Processing -- Periodicals; Electronics -- Mathematics -- Periodicals; 621.3
• DOI: 10.1108/COMPEL-02-2020-0082
• Languages: English
• ISSNs: 0332-1649

Abstract

Abstract : Purpose: Multilevel inverter (MLI) is an established design approach for inverter applications in medium-voltage and high-voltage range of applications. An asymmetric design synthesizes multiple DC input voltage sources of unequal magnitudes to generate a high-quality staircase sinewave comprising a large number of steps or levels. However, the implications of using sources of unequal magnitudes results in the requirements of a large variety of inverter switches and higher magnitudes of the total blocking voltage (TBV) rating of the inverter, which increase the cost. The purpose of this study is to present a solution based on algorithms for establishing DC source magnitudes and other design parameters. Design/methodology/approach: The approach used in this study is to develop algorithms that bring an asymmetric cascaded MLI (ACMLI) design close to symmetric design. This approach then reduces the variety of switch ratings and minimizes the TBV of the inverter. Thus, the benefits of both asymmetric design (generation of a large number of voltage levels in the output waveform) and symmetric design (modularity) are achieved. The proposed algorithms can be applied to a number of ACMLI topologies, including classical cascaded H-bridge (CHB). The effectiveness of the proposed algorithms is validated by simulation in Matlab-Simulink and experimental setup. Findings: Two new algorithms are proposed that reduce the number of variety of switches to just three. The variety can further be reduced to two under a specified condition. The algorithms are compared with the existing ones, and the results are promising in minimizing the TBV rating of the inverter, which results in cost reduction as well. For a specific case of four CHBs, the proposed Algorithm-1 produced 27% and Algorithm-2 produced 53% higher levels. Moreover, the presented algorithms produced minimum values of the TBV and resulted in minimum cost of inverter. Originality/value: The proposed algorithms are novel in structure and have achieved the targeted values of minimized switch variety and reduced TBV ratings. Due to less variety, the inverter achieves a near symmetric design, which enables to attain the added advantages of modularity and reduced difference of power sharing among the DC sources.