A comparative study of phase margin based digital and analog controlled synchronous buck with optimum LC filter. Issue 6 (25th July 2019)

• Record Type: Journal Article
• Authors: Rashmi, Ruchi; Jagtap, Shweta
• Is Part Of: Compel. Volume 38:Issue 6(2019)
• Page Start: 2020
• Page End: 2039
• Publication Date: 2019-07-25
• Subjects: DC-DC converters -- Power systems stability -- Power electronic simulation -- Bode plot -- Digital control -- Sampling delay -- Bandwidth -- Discrete compensator -- SISO tool -- Steady state -- Transient state; Electrical engineering -- Data Processing -- Periodicals; Electrical engineering -- Mathematics -- Periodicals; Electrical engineering -- Periodicals; Electronics -- Data Processing -- Periodicals; Electronics -- Mathematics -- Periodicals; 621.3
• DOI: 10.1108/COMPEL-12-2018-0508
• Languages: English
• ISSNs: 0332-1649

Abstract

Abstract : Purpose: Traditionally, industrial power supplies have been exclusively controlled through analog control to sustain high reliability with low cost. However, with the perpetual decrement in cost of digital controllers, the feasibility of a digitally controlled switch mode power supply has elevated significantly. This paper aims to outline the challenges related to the design of digital proportional-integral (PI) controlled synchronous rectifier (SR) buck converter by comparing controller performance in continuous and discrete time. The trapezoidal approximation-based digital PI control is designed for low voltage and high-frequency SR buck converter operating under continuous conduction mode. Design/methodology/approach: The analog and digital controller are designed using a SISO tool of MATLAB. Here, zero-order hold transform is used to convert the transfer function from continuous to discrete time. Frequency and time domain analysis of continuous plant, discrete plant and close loop system is performed. The designed digital PI control is simulated in MATLAB Simulink. The simulated results is also verified on hardware designed around digital signal processing control. Findings: The continuous and discrete control loops are validated with multiple tests in the time and frequency domain. The detailed steady state theoretical analysis and performance of the SR buck converter is presented and verified by simulation. It is found that the delay in digital control loop results in a low phase margin. This phase margin decreases with higher bandwidth. The hardware experiments with the digital control loop are carried out on a 10 W prototype. The chosen parameters for the SR buck converter are found to be optimum for steady and transient state response. Originality/value: This paper compares the digital and analog control approach of compensator design. It focuses on the implications created at the time of transforming the control design from continuous to discrete time. Further, it also focuses on the selection of parameters such as phase margin, bandwidth and low pass filter.