27‐1: Fabrication Method for Miniaturized CAAC‐OS FET for High‐Definition AR/VR Displays. Issue 1 (28th June 2022) - Hodo, Ryota; Saito, Satoru; Sugaya, Kentaro; Hiura, Yoshikazu; Fujie, Takahiro; Sasagawa, Shinya; Murakawa, Tsutomu; Kunitake, Hitoshi; Yamazaki, Shunpei
Abstract : An island formation method for fabrication of a miniaturized CAAC‐OS FET has been developed. With our etching process, the CAAC‐OS FET, which has a gate length as small as 6.5 nm, had a high on‐off drain current ratio. The high‐definition display had excellent characteristics of a low lateral leakage current.