Negative capacitance devices: sensitivity analyses of the developed TCAD ferroelectric model for HZO. (1st January 2022)

• Record Type: Journal Article
• Authors: Morozzi, A.; Hoffmann, M.; Mulargia, R.; Slesazeck, S.; Robutti, E.
• Is Part Of: Journal of instrumentation. Volume 17:Number 1(2022)
• Publication Date: 2022-01-01
• Subjects: Detector modelling and simulations II (electric fields, charge transport, multiplication and induction, pulse formation, electron emission, etc.) -- Materials for solid-state detectors -- Radiation damage to detector materials (solid state); Scientific apparatus and instruments -- Periodicals; 502.84
• DOI: 10.1088/1748-0221/17/01/C01048
• Languages: English
• ISSNs: 1748-0221

Abstract

Abstract: This work aims to investigate the suitability of innovative negative capacitance (NC) devices to be used in High Energy Physics experiments detection systems, featuring self-amplified, segmented, high granularity detectors. Within this framework, MFM (Metal-Ferroelectric-Metal) and MFIM (Metal-Ferroelectric-Insulator-Metal) structures have been investigated within the Technology-CAD environment. The strength of this approach is to exploit the behavior of a simple capacitor to accurately ad-hoc customize the TCAD library aiming at realistically modeling the polarization properties of devices fabricated with ferroelectric materials. The comparison between simulations and measurements in terms of polarization as a function of the applied electric field for both MFM and MFIM devices has been used for modeling and methodologies validation purposes. The analyses and results obtained for MFIM capacitors can be straightforwardly extended to the study of NC-FETs. This work would support the use of the TCAD modeling approach as a predictive tool to optimize the design and the operation of the new generation NC-FET devices for the future High Energy Physics experiments in the HL-LHC scenario. The NC working principle will be employed for particle detection applications in order to exceed the limits imposed by current CMOS technology in terms of power consumption, signal detectability and switching speed.