Effects of the stepped sidewall morphology on the ON-state performance for vertical GaN trench-gate MOSFETs. (1st July 2022)

• Record Type: Journal Article
• Authors: Tang, Wenxin; Zhou, Jiaan; Yu, Guohao; Wei, Xing; Tang, Wenbo; Zhang, Li; Liu, Weining; Chen, Tiwei; Yu, Zicheng; Wang, Heng; Zhang, Xiaodong; Lin, Wenkui; Huang, Zengli; Huang, Rong; Cai, Yong; Zhang, Baoshun
• Is Part Of: Applied physics express. Volume 15:Number 7(2022)
• Publication Date: 2022-07-01
• Subjects: GaN -- UMOSFET -- power device -- channel layer; Physics -- Periodicals; Technology -- Periodicals; 621.05
• DOI: 10.35848/1882-0786/ac727d
• Languages: English
• ISSNs: 1882-0778

Abstract

Abstract: Vertical GaN trench-gate MOSFETs with ∼130 nm stepped sidewalls in the p-GaN channel layer are studied and two significant influences have been observed compared to the devices with smooth sidewalls. The first effect is the degraded channel mobility of 14.6 cm 2 (V·s) −1 to 4.5 cm 2 (V·s) −1 which can be attributed to the increased probability of surface acoustic phonons scattering under inversion conditions. Another impact is that only when a drain voltage ( V DS ) is applied over 30 V can the devices switch on. It can be speculated that the stepped sidewall has a horizontal channel and the transverse electric field is inadequate to drive the electrons at low V DS . According to the investigation, when devices need to be switched at a high V DS, the stepped sidewall morphology should be taken into consideration.