Bilayer Tellurene: A Potential p‐Type Channel Material for Sub‐10 nm Transistors. Issue 2 (12th January 2021) - Li, Qiuhui; Xu, Lin; Liu, Shiqi; Yang, Jie; Fang, Shibo; Li, Ying; Ma, Jiachen; Zhang, Zhiyong; Quhe, Ruge; Yang, Jinbo; Lu, Jing
Abstract: The emerging two‐dimensional (2D) tellurium (tellurene) has attracted much attention due to its high carrier transportability and prominent air stability. Micrometer‐scale bilayer (BL) tellurene field‐effect transistors (FETs) are successfully fabricated with a large on/off current ratio of about 10 5 . Here, the transport properties of both the n‐ and p‐type double‐gated sub‐10 nm BL tellurene metal‐oxide‐semiconductor FETs (MOSFETs) are systematically explored by using ab initio quantum transport simulation. The optimized 5, 7, and 9 nm gate‐length p‐type x ‐ and y ‐directed BL tellurene MOSFETs with a proper underlap and negative capacitance dielectric can meet or nearly meet the on‐state current, delay time, power dissipation, and energy‐delay product requirements of the International Technology Roadmap for Semiconductors for the 2022–2028 horizons for high‐performance applications. This renders BL tellurene to join the air‐stable channel candidate for the p‐type sub‐10 nm transistors. Abstract : The performance of the n‐ and p‐type sub‐10 nm double‐gated air‐stable bilayer (BL) tellurene metal‐oxide‐semiconductor field‐effect transistors along the x and y directions is explored for the first time by using ab initio quantum transport calculations. With the help of the underlap and negative capacitance dielectric layers, the air‐stable BL tellurene possesses an application prospect in the p‐type sub‐10 nm high‐performance transistors.