A dual-rail/single-rail hybrid system using null convention logic circuits. (July 2022)

• Record Type: Journal Article
• Authors: Yang, Wenzha; Ma, Yong; Yan, Jiajie; Chen, Yang; Xiao, Shanlin; Yu, Zhiyi
• Is Part Of: Microelectronics journal. Volume 125(2022)
• Publication Date: 2022-07
• Subjects: Arithmetic logic unit (ALU) -- Asynchronous -- Dual-rail/single-rail hybrid -- Null convention logic (NCL); Microelectronics -- Periodicals; Microélectronique -- Périodiques; Microelectronics; Electronic journals; Journals - contents and abstracts; Periodicals; 621.3805
• DOI: 10.1016/j.mejo.2022.105446
• Languages: English
• ISSNs: 0959-8324

Abstract

Abstract: Null convention logic (NCL) is a good design approach for constructing a low-power and high-speed asynchronous system. However, NCL has a higher transistor count with a dual-rail structure, especially for large-scale circuits. To save NCL dual-rail overhead, we present an NCL dual-rail/single-rail hybrid system in which single-rail synchronous combinational logic is used between two NCL dual-rail registers. In addition, a 4-bit dual-rail/single-rail hybrid arithmetic logic unit (ALU) and a 4-bit dual-rail ALU are designed to compare performance. To achieve a faster speed, the operation logics in the hybrid ALU adopt transmission gates (TGs). Compared with the 4-bit NCL dual-rail ALU, the 4-bit hybrid ALU (OR operation) has advantages in smaller transistor count (reduced by 14.8%), smaller layout area (reduced by 0.16 mm 2 ), lower power consumption (reduced by 47%), lower delay (reduced by 0.19 ns), and less effect of process/voltage/temperature (PVT) variations. Moreover, the 4-bit NCL dual-rail ALU is optimized with embedded registers in terms of transistor count (reduced by 4%), TASY (reduced by 0.18 ns), and power dissipation (reduced by 0.1 mW). Abstract : An asynchronous circuit uses components to communicate with a handshake protocol. The handshake protocol defines communication agreement and data encoding; it provides a mechanism to ensure data flow between two registers (or latches) without conflict. A simple request (req)-acknowledge (ack)-based handshake protocol and date encoding are shown in Fig. 1. Handshake protocol methods can have a four-phase protocol or two-phase protocol. The two-phase handshake protocol is based on an edge trigger and uses non-return-to-zero (NRZ) transition signaling. The four-phase handshake protocol is based on the voltage level trigger and uses return-to-zero (RTZ) transition signaling; RTZ means that the request and acknowledges signals need to return 0, and NRZ does not need to return 0. Data encoding includes dual-rail and single-rail encoding. Generally, an N-bit data channel is formed with N wire pairs, and dual-encoding entails two wires per bit, which is delay insensitive (DI). A single-rail circuit has advantages in the circuit area; in contrast, the dual-rail circuit uses 1.5–2 times more areas than the single-rail circuit.