SR‐GDI CNTFET‐based magnitude comparator for new generation of programmable integrated circuits. (16th February 2022)

• Record Type: Journal Article
• Authors: Shiri, Nabiollah; Sadeghi, Ayoub; Rafiee, Mahmood; Bigonah, Maryam
• Is Part Of: International journal of circuit theory and applications. Volume 50:Number 5(2022)
• Page Start: 1511
• Page End: 1536
• Publication Date: 2022-02-16
• Subjects: CNTFET -- comparator -- gate‐diffusion‐input (GDI) -- high‐speed -- low‐power; Electric circuit analysis -- Periodicals; 621.319205
• DOI: 10.1002/cta.3251
• Languages: English
• ISSNs: 0098-9886

Abstract

Summary: The performance of the programmable integrated circuits (ICs) like digital signal processors (DSPs), central processing units (CPUs), and microcontrollers is highly dependent on the magnitude comparators. This article presents a new reliable and efficient 1‐bit comparator based on carbon nanotube field‐effect transistors (CNTFETs) technology. The gate diffusion input (GDI) technique is used to reduce the number of transistors. Also, single swing restoration (SR) transistors and transmission gate (TG) techniques are combined to attain full‐swing outputs with high driving capability. The low internal capacitances and the fewer number of internal nodes of the proposed comparator make it low‐power both in single‐bit and multibit (2‐bit, 4‐bit, 8‐bit, and 16‐bit) implementations. Variations analyses of the circuit and technology parameters are performed that show the cell efficiency. From the layout results, the 1‐bit and 16‐bit comparators occupy 0.1944 μm 2 and 37.485 μm 2 as the total die area, respectively. The proposed circuit is implemented in image processing in which the best performance compared with state‐of‐the‐art designs regarding hardware complexity, circuitry performance, and image quality assessments are confirmed, by at least 50% improvements of different critical parameters. The resulted figure of merits nominates the cell for future ICs. Abstract : In this paper, the inevitable need for transistor‐level designs as the basis of system‐level designs has led to comprehensive evaluations regarding the comparator cell as a significant arithmetic circuit. Hence, a special design at the single‐bit level based on the substantial properties of CNTFETs has been proposed and used in larger and more complex structures. Finally, it has been used in an application such as image processing which is suitable for the next‐generation programmable chips.