Current-integrating summer for DFE receiver with low common mode variation. (May 2022)

• Record Type: Journal Article
• Authors: Kondeti, Poorna Chandrika; Prusty, Suraj Kumar; Wary, Nijwm
• Is Part Of: Microelectronics journal. Volume 123(2022)
• Publication Date: 2022-05
• Subjects: Serial link -- Decision feedback equalizer (DFE) -- DFE summer -- Current integrating summer; Microelectronics -- Periodicals; Microélectronique -- Périodiques; Microelectronics; Electronic journals; Journals - contents and abstracts; Periodicals; 621.3805
• DOI: 10.1016/j.mejo.2022.105408
• Languages: English
• ISSNs: 0959-8324

Abstract

Abstract: This paper presents the design of current integrating based decision feedback equalizer (DFE) receiver. The proposed DFE incorporates a folded topology of current integrating summer which has reduced common mode voltage drop and variation at the summing nodes compared to existing topologies. The DFE uses a half-rate, soft decision architecture to alleviate the timing constraint of first feedback tap. Further, direct feedback architecture and reduced supply voltage are employed to reduce the power consumption. The DFE receiver has been implemented in 65 nm CMOS technology and operates at a data rate of 8 Gb/s over an 18.5 inch FR4 channel which has a loss of about 12.4 dB at 4 GHz frequency. It draws a current of 3.89 mA from a 0.9 V supply consuming a power of 3.5 mW.