Large‐area, high‐temperature stainless steel foil substrate for manufacturing low‐cost and flexible CMOS polysilicon TFTs. Issue 4 (26th January 2022) - Ito, Mao; Kamath, Arvind
Abstract: A large‐area stainless steel foil substrate which is compatible with high‐temperature (>800°C) processing was developed to support a hybrid printed and conventional process technology to fabricate polysilicon thin‐film transistors (TFTs). The purpose was to build a platform that could lead to low‐cost, roll‐to‐roll manufacturing of polysilicon TFTs. To fabricate a self‐aligned top‐gate TFT structure, a screen‐printed dopant process, which requires high‐temperature activation, was developed to substitute capital‐intensive ion implantation. For the pilot line process, a 300‐mm 2 and 100‐μm‐thick stainless steel substrate made of an alloy with a low thermal expansion coefficient (CTE) was chosen. Then, the foil finishing process was optimized to achieve flatness and minimize surface roughness. A barrier and dielectric encapsulation were developed to prevent trace metal diffusion from the substrate into the active layers. The polysilicon TFTs were then evaluated with static and dynamic bending tests. Abstract : A large‐area stainless steel foil substrate which is compatible with high‐temperature (>800°C) processing was developed to fabricate polysilicon thin‐film transistors (TFTs) using screen‐printed dopant. The finishing process of the foil was optimized to achieve flatness and minimize surface defect. The top‐gate polysilicon TFTs were fabricated then evaluated with static and dynamic bending tests.