Design and standalone characterisation of a capacitively coupled HV-CMOS sensor chip for the CLIC vertex detector. (12th September 2017)

• Record Type: Journal Article
• Authors: Kremastiotis, I.; Ballabriga, R.; Campbell, M.; Dannheim, D.; Fiergolski, A.; Hynds, D.; Kulis, S.; Peric, I.
• Is Part Of: Journal of instrumentation. Volume 12:Number 9(2017:Sep.)
• Page Start: P09012
• Page End: P09012
• Publication Date: 2017-09-12
• Subjects: Analogue electronic circuits -- Front-end electronics for detector readout -- Pixelated detectors and associated VLSI electronics -- VLSI circuits; Scientific apparatus and instruments -- Periodicals; 502.84
• DOI: 10.1088/1748-0221/12/09/P09012
• Languages: English
• ISSNs: 1748-0221

Abstract

Abstract: The concept of capacitive coupling between sensors and readout chips is under study for the vertex detector at the proposed high-energy CLIC electron positron collider. The CLICpix Capacitively Coupled Pixel Detector (C3PD) is an active High-Voltage CMOS sensor, designed to be capacitively coupled to the CLICpix2 readout chip. The chip is implemented in a commercial 180 nm HV-CMOS process and contains a matrix of 128×128 square pixels with 25μm pitch. First prototypes have been produced with a standard resistivity of ∼20 Ω cm for the substrate and tested in standalone mode. The results show a rise time of ∼20 ns, charge gain of 190 mV/ke − and ∼40 e − RMS noise for a power consumption of 4.8μW/pixel. The main design aspects, as well as standalone measurement results, are presented.