Deterministic Shallow Dopant Implantation in Silicon with Detection Confidence Upper‐Bound to 99.85% by Ion–Solid Interactions. Issue 3 (12th November 2021)

• Record Type: Journal Article
• Authors: Jakob, Alexander M.; Robson, Simon G.; Schmitt, Vivien; Mourik, Vincent; Posselt, Matthias; Spemann, Daniel; Johnson, Brett C.; Firgau, Hannes R.; Mayes, Edwin; McCallum, Jeffrey C.; Morello, Andrea; Jamieson, David N.
• Is Part Of: Advanced materials. Volume 34:Issue 3(2022)
• Page Start: n/a
• Page End: n/a
• Publication Date: 2021-11-12
• Subjects: nanomaterials -- nanotechnology -- semiconductors -- sensors; Materials -- Periodicals; Chemical vapor deposition -- Periodicals; 620.11
• DOI: 10.1002/adma.202103235
• Languages: English
• ISSNs: 0935-9648

Abstract

Abstract: Silicon chips containing arrays of single dopant atoms can be the material of choice for classical and quantum devices that exploit single donor spins. For example, group‐V donors implanted in isotopically purified 28 Si crystals are attractive for large‐scale quantum computers. Useful attributes include long nuclear and electron spin lifetimes of 31 P, hyperfine clock transitions in 209 Bi or electrically controllable 123 Sb nuclear spins. Promising architectures require the ability to fabricate arrays of individual near‐surface dopant atoms with high yield. Here, an on‐chip detector electrode system with 70 eV root‐mean‐square noise (≈20 electrons) is employed to demonstrate near‐room‐temperature implantation of single 14 keV 31 P + ions. The physics model for the ion–solid interaction shows an unprecedented upper‐bound single‐ion‐detection confidence of 99.85 ± 0.02% for near‐surface implants. As a result, the practical controlled silicon doping yield is limited by materials engineering factors including surface gate oxides in which detected ions may stop. For a device with 6 nm gate oxide and 14 keV 31 P + implants, a yield limit of 98.1% is demonstrated. Thinner gate oxides allow this limit to converge to the upper‐bound. Deterministic single‐ion implantation can therefore be a viable materials engineering strategy for scalable dopant architectures in silicon devices. Abstract : On‐chip electrodes are employed to signal near‐surface single‐ion implantation in silicon. A physical model of the signals provides insights into the ion stopping trajectories within the silicon chip and reveals greater than 99.8% single‐ion‐detection confidence. The study demonstrates the feasibility of controlled scalable dopant architecture engineering for classical and quantum silicon devices.