Memory-less discrete Gaussian sampler on FPGA. (February 2022) - Allailou, Boufeldja; Saoudi, Mohamed; Drouiche, Amine
Abstract: The work presented in this paper aims to develop and to implement on FPGA a memory-less discrete Gaussian sampler in the context of lattice-based cryptography. The memory-less characteristic of the proposed sampler arises from the need to integrate Lattice-Based Cryptography schemes in constrained devices. The rejection method is chosen because it offers the possibility to design a sampler that does not need any precomputed table. The implemented hardware architecture enables us to generate discrete Gaussian samples for any given standard deviation without using any precomputed tables.