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HARVARD Citation
Gracia, D. et al. (2021). Analysis of nanoscale digital circuits using novel drain-gate underlap DMG hetero-dielectric TFET. Microelectronics journal. p. . [Online].
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Gracia, D. et al. (2021). Analysis of nanoscale digital circuits using novel drain-gate underlap DMG hetero-dielectric TFET. Microelectronics journal. p. . [Online].