Realizing Wafer‐Scale and Low‐Voltage Operation MoS2 Transistors via Electrolyte Gating. (18th November 2019)

• Record Type: Journal Article
• Authors: Tang, Hongwei; Niu, Wei; Liao, Fuyou; Zhang, Haima; Xu, Hu; Deng, Jianan; Chen, Jing; Qiu, Zhijun; Wan, Jing; Pu, Yong; Bao, Wenzhong
• Is Part Of: Advanced Electronic Materials. Volume 6:Number 1(2020)
• Page Start: n/a
• Page End: n/a
• Publication Date: 2019-11-18
• Subjects: electric double layer effect -- field effect transistors -- MoS 2 -- polymer electrolytes; Materials -- Electric properties -- Periodicals; Materials science -- Periodicals; Magnetic materials -- Periodicals; Electronic apparatus and appliances -- Periodicals; 537
• DOI: 10.1002/aelm.201900838
• Languages: English
• ISSNs: 2199-160X

Abstract

Abstract: Electrolyte gating, based on the electric double‐layer effect, has been widely used for 2D layered materials (2DLMs), since it is capable of inducing an ultrahigh charge‐carrier density while requiring only a low gate voltage. However, the wafer‐scale fabrication of high‐performance field effect transistors (FETs) based on electrolyte gating remains challenging, due to the lack of an appropriate electrolyte film coating technique. Wafer‐scale MoS2 FETs gated by high‐quality thin electrolyte film are demonstrated. The electrolyte film, formed by spin‐coating method, has a characteristic capacitance in the order of 10 µF cm −2 and shows a great compatible capability in the device fabrication process. Such electrolyte‐based top‐gated FETs arrays are successfully manufactured based on the wafer‐scale MoS2 film thereafter. The resulting MoS2 FETs operate at a low voltage (<1 V) with a current on/off ratio exceeding 10 4, as well as a small steep subthreshold swing (110 mV dec −1 ). Moreover, the realization of enhancement mode (E‐mode) MoS2 FET induced by electrolyte gating shows great potential for multistage logic circuits. A resistance‐loaded MoS2 inverter is also demonstrated with an operation frequency up to 500 Hz. The results provide the possibilities for realizing large‐scale electrolyte‐gated logic circuits based on 2DLMs. Abstract : A wafer‐scale top‐gated MoS2 transistor array is successfully demonstrated and serves as a high‐quality thin electrolyte film dielectric layer. Electrolyte‐gated MoS2 transistors exhibit excellent electrical performance at a low supply voltage (<1 V). The resulting enhancement‐mode device is assembled to produce logic gates as an inverter with a switch speed over 500 Hz.