Memristor‐Based Efficient In‐Memory Logic for Cryptologic and Arithmetic Applications. Issue 7 (13th June 2019)

• Record Type: Journal Article
• Authors: Xu, Liying; Yuan, Rui; Zhu, Zhenhua; Liu, Keqin; Jing, Zhaokun; Cai, Yimao; Wang, Yu; Yang, Yuchao; Huang, Ru
• Is Part Of: Advanced materials technologies. Volume 4:Issue 7(2019)
• Page Start: n/a
• Page End: n/a
• Publication Date: 2019-06-13
• Subjects: Boolean logic -- encryption -- full adder -- Hamming distance -- in‐memory computing -- memristors; Materials science -- Periodicals; Technological innovations -- Periodicals; Materials science; Technological innovations; Periodicals; 620.1105
• DOI: 10.1002/admt.201900212
• Languages: English
• ISSNs: 2365-709X

Abstract

Abstract: As the era of big data dawns, conventional digital computers face increasing difficulties in performance and power efficiency due to their von Neumann architecture, leading to an urgent requirement for computing paradigms that can merge logic and memory. An efficient in‐memory logic approach based on unipolar memristors that is capable of implementing all 16 Boolean logic functions in the same cell in less than 3 logic steps using a thermochemical metallization cell, where the confinement of filament diameter and thus switching location have reduced the threshold voltages and improved the switching uniformity, is experimentally demonstrated. The high efficiency of the logic units allows for the construction of novel encryption hardware in which both the encryption and decryption processes are achieved by memristor logic while the encryption key is also generated from the intrinsic stochasticity of resistive switching. The memristive array is also used to implement the calculation of Hamming distance and 1‐bit binary full adder with high efficiency, thus paving a way for future non‐von Neumann computing architectures. Abstract : An efficient in‐memory logic approach based on unipolar memristors that can implement all 16 Boolean logic functions in a single cell in less than 3 logic steps is proposed and demonstrated. By scaling up to an array, a hardware encryption/decryption system is demonstrated, and the calculation of Hamming distance and 1‐bit binary full adder is also achieved with high efficiency.