Towards the realization of regular clocking-based QCA circuits using genetic algorithm. (January 2022)

• Record Type: Journal Article
• Authors: Pramanik, Amit Kumar; Bhowmik, Dhrubajyoti; Pal, Jayanta; Sen, Pinaki; Saha, Apu Kumar; Sen, Bibhash
• Is Part Of: Computers & electrical engineering. Volume 97(2022)
• Publication Date: 2022-01
• Subjects: Quantum-dot cellular automata -- Genetic Algorithm -- Circuit minimization -- Regular clocking -- USE clocking -- RES clocking; Computer engineering -- Periodicals; Electrical engineering -- Periodicals; Electrical engineering -- Data processing -- Periodicals; Ordinateurs -- Conception et construction -- Périodiques; Électrotechnique -- Périodiques; Électrotechnique -- Informatique -- Périodiques; Computer engineering; Electrical engineering; Electrical engineering -- Data processing; Periodicals; Electronic journals; 621.302854
• DOI: 10.1016/j.compeleceng.2021.107640
• Languages: English
• ISSNs: 0045-7906

Abstract

Abstract: Quantum-dot cellular automata (QCA) has gained an exclusive research focus on the current CMOS due to low power dissipation, less circuit area occupancy, and computational speed. The effectiveness of a QCA circuit is affected by the primary logic (majority vote and inverter). Hence, the minimization of these primitives for QCA logic circuit synthesis becomes an extreme necessity. The genetic algorithm (GA) has a more important effect on the synthesis of cost-effective circuits. Besides, the underlying regular clocking scheme is significant in systematic cell layout, scalability, and reliability. This paper emphasizes the design of a cost-effective circuit, applying a genetic algorithm incorporating the regular clock. Multi-output functions are taken into account here to minimize with the help of a genetic algorithm. All the circuits are synthesized by utilizing RES, USE clocking scheme. The analytical study indicates the significance of the genetic algorithm on the design of QCA using the regular clock. Graphical abstract: Highlights: An elitism-based Genetic Algorithm(GA) is proposed for the minimization of circuits. Five Multi-Output functions have been considered to investigate the effectiveness. QCADesigner is used to simulate the pre and post Genetic Algorithm based circuits. The impact of regular clocking on the circuits designed pre and post GA is explored. Primary metrics are considered in logic simulation and comparative discussion.