A Top‐Down Platform Enabling Ge Based Reconfigurable Transistors. Issue 1 (23rd September 2021) - Böckle, Raphael; Sistani, Masiar; Lipovec, Boris; Pohl, Darius; Rellinghaus, Bernd; Lugstein, Alois; Weber, Walter M.
Abstract: Conventional field‐effect transistor (FET) concepts are limited to static electrical functions and demand extraordinarily steep and reproducible doping concentration gradients. Reaching the physical limits of scaling, doping‐free reconfigurable field‐effect transistors (RFETs) capable of dynamically altering the device operation between p‐ or n‐type, even during runtime, are emerging device concepts. In this respect, Ge has been identified as a promising channel material to enable reduction of power consumption and switching delay of RFETs. Nevertheless, its use has been limited to simulations and bottom‐up demonstrators not compatible with complex circuit technology. In this work, a deterministic top‐down fabrication scheme is demonstrated to realize a Ge‐based RFET architecture and exploring realizations with three independent gates. Polarity control and leakage current suppression are enabled by the specific injection of charge carriers through gated Al‐Ge heterojunctions and the introduction of a blocking electrostatic energy barrier. Further, the choice of monolithic Al/Ge contacts alleviates process variability compared to Ni‐germanide contacts presenting a top‐down technology platform for Ge‐based RFETs. Our device concept is a first step toward future integrated high‐performance and low‐power reconfigurable circuits, providing a platform for future energy‐efficient systems as well as hardware security integrated circuits. Abstract : Ge is considered a key material for improving device performance and delivering enhanced functionalities. Here, a fabrication scheme of reconfigurable transistors based on monolithic Al‐Ge‐Al heterostructures is demonstrated, capable of electrostatically programming p‐ and n‐type device operation. The proposed platform provides a significant step toward a beyond‐CMOS approach enabling functional diversification and alternative computing of the post‐Si era.