An efficient implementation of low‐power approximate compressor–based multiplier for cognitive communication systems. (2nd October 2019)
- Record Type:
- Journal Article
- Title:
- An efficient implementation of low‐power approximate compressor–based multiplier for cognitive communication systems. (2nd October 2019)
- Main Title:
- An efficient implementation of low‐power approximate compressor–based multiplier for cognitive communication systems
- Authors:
- R.P., Meenaakshi Sundhari
- Other Names:
- Raj Jennifer S. guestEditor.
Chen Joy Iong‐Zong guestEditor.
Kotuliak Ivan guestEditor.
Kamel Khaled guestEditor. - Abstract:
- Summary: Image compression is significant for resourceful transmission and storage of images. The multimedia data like image, audio, and videos are uploaded in the Internet through telecommunication networks. Actual image size plays when page utilization is higher. So image compression standard joint photographic experts group (JPEG) is used for storing images in a compressed format. The quality of JPEG is that it yields little loss in quality using high compression ratios. Multiplier and adder play a major hardware resource in JPEG compression. To reduce this, hardware complexity here proposed a compressor‐based multiplier to increase the performance of JPEG standard as well as reducing the logic resources. This architecture is going to be implemented in CYCLONE IV FPGA with 512 × 512 and 640 × 480 resolutions of images. Abstract : Multiplier and adder play a major hardware resource in JPEG compression. To reduce this hardware complexity, here, we proposed a compressor‐based multiplier to increase the performance of JPEG standard as well as reducing the logic resources. Verilog hardware description language (HDL) is used to develop proposed JPEG compression system, and it is implemented in CYCLONE IV FPGA with 512 × 512 and 640 × 480 resolutions of images. The proposed method is evaluated in terms of logic element, power, and clock rate with various conventional architectures.
- Is Part Of:
- International journal of communication systems. Volume 35:Number 2(2022)
- Journal:
- International journal of communication systems
- Issue:
- Volume 35:Number 2(2022)
- Issue Display:
- Volume 35, Issue 2 (2022)
- Year:
- 2022
- Volume:
- 35
- Issue:
- 2
- Issue Sort Value:
- 2022-0035-0002-0000
- Page Start:
- n/a
- Page End:
- n/a
- Publication Date:
- 2019-10-02
- Subjects:
- communication systems -- FPGA -- JPEG compression -- multiplier
Telecommunication systems -- Periodicals
621.382 - Journal URLs:
- http://onlinelibrary.wiley.com/ ↗
- DOI:
- 10.1002/dac.4180 ↗
- Languages:
- English
- ISSNs:
- 1074-5351
- Deposit Type:
- Legaldeposit
- View Content:
- Available online (eLD content is only available in our Reading Rooms) ↗
- Physical Locations:
- British Library DSC - 4542.172515
British Library DSC - BLDSS-3PM
British Library STI - ELD Digital store - Ingest File:
- 20309.xml