Ultra-efficient adders and even parity generators in nano scale. (December 2021)

• Record Type: Journal Article
• Authors: Ahmadpour, Seyed-Sajad; Mosleh, Mohammad
• Is Part Of: Computers & electrical engineering. Volume 96:Part B(2021)
• Publication Date: 2021-12
• Subjects: Nano-scale -- Adder -- Even parity generator -- 2-dimensional clocking; Computer engineering -- Periodicals; Electrical engineering -- Periodicals; Electrical engineering -- Data processing -- Periodicals; Ordinateurs -- Conception et construction -- Périodiques; Électrotechnique -- Périodiques; Électrotechnique -- Informatique -- Périodiques; Computer engineering; Electrical engineering; Electrical engineering -- Data processing; Periodicals; Electronic journals; 621.302854
• DOI: 10.1016/j.compeleceng.2021.107548
• Languages: English
• ISSNs: 0045-7906

Abstract

Highlights: Proposing a novel and optimal 5-input majority gate (MV5) with 11 cells by QCADesigner software. Evaluating power consumption of the proposed MV5 structure compared with the recently developed structures by QCAPro tool. Proposing effective QCA coplanar full-adder using the proposed MV5. Implementing the proposed QCA 1 and 4-bit adders using a 2-DW clocking scheme. Presenting efficient QCA 2-input Ex-OR using the proposed MV5. Presenting well organized 4, 8, 16, and 32-bit even parity generators using the proposed QCA Ex-OR gate. Abstract: This paper suggests a single-layer 5-input majority gate (MV5) using 11 simple cells in the Quantum-Dot Cellular Automata (QCA) technology. All simulations are performed by QCADesigner 2.0.03. Moreover, the energy consumption of the suggested 5-input majority gate is calculated using the QCAPro tool. The suggested gate shows power consumption improvements by 15.69, 9.56, and 5.95% at three levels of 0.5Ek, 1Ek, and 1.5Ek compared with the best previous designs. Moreover, using the suggested gate, n -bit QCA adder and n -bit even parity generator are designed. A comparison of the cell counts in the suggested 1-bit full-adder and the 4-bit even parity generator with the best previous structures shows 35.21% and 6.12% improvements, respectively. In addition, the suggested 4-bit and 8-bit adders show 2.29%, 4.87%, 5.76% and 24.29% improvements in terms of the cell counts compared to the best designs, respectively. Graphical abstract: Graphical abstract Image, graphical abstract .