Analog pile-up circuit technique using a single capacitor for the readout of Skipper-CCD detectors. (11th November 2021) - Sofo Haro, M.; Chavez, C.; Lipovetzky, J.; Alcalde Bessia, F.; Cancelo, G.; Chierchie, F.; Estrada, J.; Fernandez Moroni, G.; Stefanazzi, L.; Tiffenberg, J.; Uemura, S.
Abstract: With Skipper-CCD detectors it is possible to take multiple samples of the charge packet collected on each pixel. After averaging the samples, the noise can be extremely reduced allowing the exact counting of electrons per pixel. In this work we present an analog circuit that, with a minimum number of components, applies a double slope integration (DSI) and at the same time averages the multiple samples, producing at its output the pixel value with sub-electron noise. For this purpose, we introduce the technique of using the DSI integrator capacitor to add the skipper samples. An experimental verification using discrete components is presented, together with an analysis of its noise sources and limitations. After averaging 400 samples it was possible to reach a readout noise of 0.18 e - rms /pix, comparable to other available readout systems. Due to its simplicity and significant reduction of the sampling requirements, this circuit technique is of particular interest in particle experiments and cameras with a high density of Skipper-CCDs.