GaAs on Si substrate with dislocation filter layers for wafer‐scale integration. Issue 5 (28th October 2021)

• Record Type: Journal Article
• Authors: Kim, HoSung; Kim, Tae‐Soo; An, Shinmo; Kim, Duk‐Jun; Kim, Kap Joong; Ko, Young‐Ho; Ahn, Joon Tae; Han, Won Seok
• Is Part Of: ETRI journal. Volume 43:Issue 5(2021)
• Page Start: 909
• Page End: 915
• Publication Date: 2021-10-28
• Subjects: bowing -- heteroepitaxy -- metalorganic chemical vapor deposition -- threading dislocation density; Telecommunication -- Periodicals; Electronics -- Periodicals; Electronics; Telecommunication; Periodicals; Periodicals; 621.38205
• DOI: 10.4218/etrij.2021-0003
• Languages: English
• ISSNs: 1225-6463

Abstract

Abstract: GaAs on Si grown via metalorganic chemical vapor deposition is demonstrated using various Si substrate thicknesses and three types of dislocation filter layers (DFLs). The bowing was used to measure wafer‐scale characteristics. The surface morphology and electron channeling contrast imaging (ECCI) were used to analyze the material quality of GaAs films. Only 3‐μm bowing was observed using the 725‐μm‐thick Si substrate. The bowing shows similar levels among the samples with DFLs, indicating that the Si substrate thickness mostly determines the bowing. According to the surface morphology and ECCI results, the compressive strained indium gallium arsenide/GaAs DFLs show an atomically flat surface with a root mean square value of 1.288 nm and minimum threading dislocation density (TDD) value of 2.4 × 10 7 cm −2 . For lattice‐matched DFLs, the indium gallium phosphide/GaAs DFLs are more effective in reducing the TDD than aluminum gallium arsenide/GaAs DFLs. Finally, we found that the strained DFLs can block propagate TDD effectively. The strained DFLs on the 725‐μm‐thick Si substrate can be used for the large‐scale integration of GaAs on Si with less bowing and low TDD.