Comprehensive study of variability in poly-Si channel nanowire transistor. (22nd February 2019)

• Record Type: Journal Article
• Authors: Ota, Kensuke; Kawai, Tomoya; Saitoh, Masumi
• Is Part Of: Japanese journal of applied physics. Volume 58:Number SB(2019)
• Publication Date: 2019-02-22
• Subjects: Physics -- Periodicals; 621.05
• DOI: 10.7567/1347-4065/aafc9d
• Languages: English
• ISSNs: 0021-4922

Abstract

Abstract: Variability in poly-Si nanowire transistors (NW Tr.) is studied with respect to device and grain size. Threshold voltage ( V th ) variability decreases as grain size or NW width ( W ) decreases since the number of grain boundaries in carrier passage increases. Drain current ( I d ) variability shows similar grain size and W dependences, while I d variability in short channel Tr. is suppressed due to the parasitic resistance. In addition, I d variability decreases with high lateral or perpendicular electric field as well as high temperature due to potential barrier lowering at grain boundaries.