On the interpretation of MOS impedance data in both series and parallel circuit topologies. (November 2021) - Caruso, E.; Lin, J.; Monaghan, S.; Cherkaoui, K.; Floyd, L.; Gity, F.; Palestri, P.; Esseni, D.; Selmi, L.; Hurley, P.K.
Highlights: Method to extract useful MOS parameters: Cox, doping and minority carrier lifetime. Interpretation of MOS impedance using both series and parallel equivalent circuit. Extraction reproducing the functions G/ω and −ωdC/dω by using TCAD simulations. Approximated analytical equation for the axtraction are also presented and discussed. Procedure is general and can be applied to all MOSCAPs that show inversion responses. Abstract: We investigate the interplay between the series (S) and parallel (P) equivalent circuit representations of the MOS system conductance (G) and capacitance (C) in inversion. Experimental and simulated data for Si and InGaAs MOSCAPs are firstly analyzed mathematically. It is found that by interpreting the measured data in both the series and parallel mode, five independent values are obtained for the magnitude and frequency of the maxima and minima points of the −ωdCS, P /dω and GS, P /ω functions versus angular frequency (ω). The significance and application of the approach is presented and discussed.