A novel electromigration characterization method based on low-frequency noise measurements. (6th June 2019) - Beyne, Sofie; Pedreira, Olalla Varela; Wolf, Ingrid De; Tőkei, Zsolt; Croes, Kristof
Abstract: A new electromigration (EM) test method, based on low-frequency noise (LFN) measurements is demonstrated and validated for advanced nano-interconnects, conformable to the 10 nm semiconductor technology nodes and beyond. For the first time, the methodology is applied to electromigration test structures where different metal layers are connected by vias. Firstly, it is established that LFN can be used to calculate electromigration activation energies in via-containing nano-interconnects. This finding is verified by comparing the activation energy obtained by LFN with the one calculated using standard accelerated EM tests on a wide variety of interconnect types. The large correlation between both values (≥90%) indicates that LFN can indeed be applied to successfully determine EM activation energies. Secondly, LFN is shown to provide an indication of electromigration damage in nano-interconnects, which allows linking the noise magnitude with a defect concentration. The first two findings are then combined to provide qualitative predictions of electromigration lifetimes. Two models are proposed: one for void nucleation (the time to form a critical void that will thereafter start growing) and one for void growth (the time between the formation of the critical void and failure, i.e. when the void spans the entire line thickness). Also in this case very strong correlations between LFN measurements and EM experiments were found (≥90% for single metal lines and ≥80% for via-containing structures). The main advantages of using LFN measurements over standard tests for electromigration characterization are that they are non-destructive (no electromigration damage is induced during the test), much faster (a 300 mm wafer can be characterized in a matter of days, as opposed to the weeks it can take using standard EM tests), and that they can be done at test conditions closer to actual operation of the interconnects, such that inducing different mechanisms due to over-stress is avoided.