Recent Progress on Perovskite Surfaces and Interfaces in Optoelectronic Devices. Issue 30 (17th June 2021) - Luo, Deying; Li, Xiaoyue; Dumont, Antoine; Yu, Hongyu; Lu, Zheng‐Hong
Abstract: Surfaces and heterojunction interfaces, where defects and energy levels dictate charge‐carrier dynamics in optoelectronic devices, are critical for unlocking the full potential of perovskite semiconductors. In this progress report, chemical structures of perovskite surfaces are discussed and basic physical rules for the band alignment are summarized at various perovskite interfaces. Common perovskite surfaces are typically decorated by various compositional and structural defects such as residual surface reactants, discrete nanoclusters, reactions by products, vacancies, interstitials, antisites, etc. Some of these surface species induce deep‐level defect states in the forbidden band forming very harmful charge‐carrier traps and affect negatively the interface band alignments for achieving optimal device performance. Herein, an overview of research progresses on surface and interface engineering is provided to minimize deep‐level defect states. The reviewed subjects include selection of interface and substrate buffer layers for growing better crystals, materials and processing methods for surface passivation, the surface catalyst for microstructure transformations, organic semiconductors for charge extraction or injection, heterojunctions with wide bandgap perovskites or nanocrystals for mitigating defects, and electrode interlayer for preventing interdiffusion and reactions. These surface and interface engineering strategies are shown to be critical in boosting device performance for both solar cells and light‐emitting diodes. Abstract : Recent progress on perovskite surface and interface science of perovskite optoelectronic devices is summarized. The impact of various surface and interface defects on heterojunction energy barriers and carrier dynamics in devices is reviewed and discussed. Practical engineering methods to mitigate these defects at various interfaces in devices are also considered.