Toward efficient implementation of basic balanced ternary arithmetic operations in CNFET technology. (August 2019)

• Record Type: Journal Article
• Authors: Toulabinejad, Maryam; Taheri, MohammadReza; Navi, Keivan; Bagherzadeh, Nader
• Is Part Of: Microelectronics journal. Volume 90(2019)
• Page Start: 267
• Page End: 277
• Publication Date: 2019-08
• Subjects: Multiple-valued logic -- Balanced ternary arithmetic -- CNFET -- Nanoelectronics -- VLSI design; Microelectronics -- Periodicals; Microélectronique -- Périodiques; Microelectronics; Electronic journals; Journals - contents and abstracts; Periodicals; 621.3805
• DOI: 10.1016/j.mejo.2019.05.010
• Languages: English
• ISSNs: 0959-8324

Abstract

Abstract: The balanced ternary representation allows for significant performance improvement for ternary systems. Immaturity of the semiconductor industry in providing an applicable device for ternary infrastructures during the past decades is an enormous obstacle to actualize the ternary circuit realization. Among the promising devices for this purpose, carbon nanotube field effect transistor (CNFET) is qualified with outstanding characteristics which make it suitable for implementing the ternary logic functions. In this paper, for the first time, we present and evaluate the basic ternary arithmetic circuits in balanced representation based on the CNFET technology. Experimental evaluation of reviewed designs in both balanced and unbalanced representation indicates the superiority of the balanced representation in the design of ternary arithmetic blocks.