A non-overlapped implantation MOSFET differential pair implementation of bidirectional weight update synapse for neuromorphic computing. (August 2019)

• Record Type: Journal Article
• Authors: Jeng, E.S.; Chen, H.X.; Chiang, Y.L.; Chang, J.H.; Chen, J.Y.
• Is Part Of: Microelectronics journal. Volume 90(2019)
• Page Start: 306
• Page End: 314
• Publication Date: 2019-08
• Subjects: Neuromorphics -- Neural network hardware -- Analog memory -- Artificial synapse; Microelectronics -- Periodicals; Microélectronique -- Périodiques; Microelectronics; Electronic journals; Journals - contents and abstracts; Periodicals; 621.3805
• DOI: 10.1016/j.mejo.2019.07.001
• Languages: English
• ISSNs: 0959-8324

Abstract

Abstract: A non-volatile memory (NVM) differential pair realization of the synaptic weight for an artificial neural network (ANN) circuit is investigated. Two non-overlapped implantation (NOI) nMOSFETs are proposed to form a NVM differential pair as an artificial synapse. The pair of NOI transistors are non-volatile analog memories and capable of storing positive or negative synaptic weight. In this study, a NOI differential pair based silicon neural chip of three neurons with 36 analog synapses in total is designed, simulated, fabricated, and verified by the chip-in-the-loop learning process. The classification performance of the neural chip when training and testing with the IRIS dataset is reported. This differential pair design not only overcomes the potential constraint in the weights of NOI but also exhibits better classification performances than that of single NOI-based ANN.