Reversible stochastic computing in ratioed, unsigned extended and signed extended stochastic logic formats. (August 2019)

• Record Type: Journal Article
• Authors: Akhtar, Romisa; Khanday, Farooq Ahmad
• Is Part Of: Microelectronics journal. Volume 90(2019)
• Page Start: 187
• Page End: 198
• Publication Date: 2019-08
• Subjects: Approximate computing -- Stochastic computing -- Weighted binary computing -- Reversible computing -- Stochastic reversible computing -- Stochastic number formats; Microelectronics -- Periodicals; Microélectronique -- Périodiques; Microelectronics; Electronic journals; Journals - contents and abstracts; Periodicals; 621.3805
• DOI: 10.1016/j.mejo.2019.06.010
• Languages: English
• ISSNs: 0959-8324

Abstract

Abstract: Stochastic computing is a promising technique for addressing the problems of increase in leakage current, increased sensitivity to soft errors etc. in today's semiconductor industry. Stochastic computing has been presented in open literature in detail. However, power dissipation due to bit loss has been neglected in stochastic computing which can be addressed by considering reversible circuits. Consequently, there is a need to design reversible stochastic computing systems. Therefore, the paper describes the reversible stochastic circuits and the stochastic functions implemented by already existing reversible gates (up to 3*3) in Ratioed, Unsigned Extended and Signed Extended Stochastic Logic Formats. Some novel reversible stochastic gates performing various operations in these formats are proposed, which as per the author's best knowledge, are the only reversible gates, which can perform some arithmetic operation in these formats. Finally, the implementation of reversible two-input linear neuron using the proposed reversible gates has been demonstrated.