High-speed FPGA implementation of orthogonal matching pursuit for compressive sensing signal reconstruction. (October 2018)

• Record Type: Journal Article
• Authors: Polat, Önder; Kayhan, Sema Koç
• Is Part Of: Computers & electrical engineering. Volume 71(2018)
• Page Start: 173
• Page End: 190
• Publication Date: 2018-10
• Subjects: Compressive sensing -- Field-programmable gate array (FPGA) -- Orthogonal matching pursuit (OMP) -- Sparse signal recovery; Computer engineering -- Periodicals; Electrical engineering -- Periodicals; Electrical engineering -- Data processing -- Periodicals; Ordinateurs -- Conception et construction -- Périodiques; Électrotechnique -- Périodiques; Électrotechnique -- Informatique -- Périodiques; Computer engineering; Electrical engineering; Electrical engineering -- Data processing; Periodicals; Electronic journals; 621.302854
• DOI: 10.1016/j.compeleceng.2018.07.017
• Languages: English
• ISSNs: 0045-7906

Abstract

Abstract: In this paper, a reconfigurable, high-speed, low-power, and vendor-independent field-programmable gate array (FPGA) implementation of the orthogonal matching pursuit (OMP) algorithm is presented. Unlike existing previous work, the proposed architecture is reconfigurable, that is, the architecture can accept different signal sizes, different sparsity levels, and sampling matrix sizes. Furthermore, the Goldschmidt algorithm is used to implement the fixed point division unit that achieves state-of-the-art performance. To the best of our knowledge, the presented architecture demonstrates the fastest reconstruction times for the standard OMP algorithm on FPGA for high sparsity levels. The proposed design is able to recover a 128-length signal with K = 5 in 7.75 μs and 256-length signals with K = 8 and K = 12 in 23.27 μs and 39.56 μs respectively. The results also show that our design outperforms many other existing FPGA implementations in terms of power consumption.