Efficient signal selection using supervised learning model for enhanced state restoration. (17th June 2020)

• Record Type: Journal Article
• Authors: Rajendran, Agalya; Rajappa, Muthaiah
• Other Names: Srivastava Gautam guestEditor.; Hsu Ching‐Hsien (Robert) guestEditor.; Kumar Priyan Malarvizhi guestEditor.
• Is Part Of: Computational intelligence. Volume 37:Number 3(2021)
• Page Start: 1141
• Page End: 1154
• Publication Date: 2020-06-17
• Subjects: combinational gates -- controllability -- observability -- pre‐silicon verification -- state restoration and trace buffer; Artificial intelligence -- Periodicals; Computational linguistics -- Periodicals; 006.3
• DOI: 10.1111/coin.12344
• Languages: English
• ISSNs: 0824-7935

Abstract

Abstract: The post‐silicon validation and debug is the most important task in the contemporary integrated circuit design methodology. The vital problem prevailing in this system is that it has limited observability and controllability due to the minimum number of storage space in the trace buffer. This tends to select the signals prudently in order to maximize state reconstruction. In the reported works, to select and to restore the signals efficiently it is categorized into two types like low simulation with high‐quality technique and high simulation with low‐quality technique. In this work, a node‐based combinational gate signal selection algorithm is proposed based on machine learning method that maximizes the state restoration capability. A significant improvement (80%) has made to achieve adequate simulation time with the high‐quality associated with the state‐of‐the‐art of supplementary methods.