A hysteresis space vector modulation for interleaved Vienna rectifier fed 3‐level neutral point clamped inverter system. (14th June 2021)

• Record Type: Journal Article
• Authors: Palanisamy, R.; Vijayakumar, K.; Thamizh Thentral, T. M.; Usha, S.; Balasubramanian, Karthik
• Is Part Of: International transactions on electrical energy systems. Volume 31:Number 8(2021)
• Page Start: n/a
• Page End: n/a
• Publication Date: 2021-06-14
• Subjects: capacitor voltage balancing -- hysteresis space vector modulation -- interleaved Vienna rectifier -- multicarrier sinusoidal pulse width modulation -- neutral point clamped inverter; Electric power -- Periodicals; Electric power systems -- Periodicals; Electrical engineering -- Periodicals; 621.3
• DOI: 10.1002/2050-7038.12983
• Languages: English
• ISSNs: 2050-7038

Abstract

Summary: In this article, a hysteresis space vector modulation (HSVM) is developed for interleaved Vienna rectifier (IVR) fed 3‐level neutral point clamped inverter (NPCI) system. The minimized current ripple and improved output voltage is obtained using HSVM control technique. The output of IVR is fed with 3‐level NPCI, which provides continuous input source, balanced capacitor voltage and minimized common mode voltage. Hysteresis circular region‐based control method is implemented to minimize the current ripple in the rectifier side. The multicarrier sinusoidal pulse width modulation technique is used to control 3‐level NPC inverter, which provides reduced total harmonic distortion (THD), balanced capacitor voltage and improved output voltage. This proposed system outputs are verified using MATLAB simulink and FPGA processor for simulation and experimental results, respectively. Abstract : Hysteresis space vector modulation (HSVM) implemented for interleaved Vienna rectifier fed 3‐level neutral point clamped inverter system. Common mode voltage is reduced to 66.8 V, which Vdc/3 times of applied dc input voltage. Capacitor voltage unbalancing is minimized to 1.1% from the output voltage. Total harmonic distortion of the proposed system is reduced to 3.2% for output voltage. Reduction of ripples in input source current and improved output voltage using HSVM.