Impedance matching theory to design an all‐optical AND gate. Issue 5 (1st October 2018)

• Record Type: Journal Article
• Authors: Mondal, Haraprasad; Sen, Mrinal; Prakash, Chandra; Goswami, Kamanashis; Sarma, Champak Kumar
• Is Part Of: IET optoelectronics. Volume 12:Issue 5(2018)
• Page Start: 244
• Page End: 248
• Publication Date: 2018-10-01
• Subjects: optical logic -- logic gates -- optical design techniques -- impedance matching -- optimisation -- photonic crystals -- finite difference time‐domain analysis -- integrated optics -- integrated optoelectronics; impedance matching theory -- all‐optical AND gate design -- photonic crystal -- optimisation -- finite‐difference‐time‐domain simulation -- extinction ratio -- photonic integrated circuit applications; Optoelectronics -- Periodicals; 621.36
• DOI: 10.1049/iet-opt.2018.0020
• Languages: English
• ISSNs: 1751-8768

Abstract

Abstract : An impedance matching theory‐based methodology is presented in this study for designing/optimising photonic crystal‐based all‐optical AND gate. A basic architecture for the AND gate is projected first, and thereafter the same is optimised utilising the proposed methodology. Performance of the AND gate is evaluated based on several metrics that are calculated using a finite‐difference‐time‐domain simulation. The optimised AND gate has exhibited a high extinction ratio in the order of 6.9 dB, within a very small footprint of ≈ 110 μ m 2 . It also supports propagation of a high bit rate (≈1 Tb/S) and has a wide operational bandwidth (≈4 THz), which make the device suitable for different photonic integrated circuit applications.