Design criteria of solid‐state circuit breaker for low‐voltage microgrids. Issue 7 (6th April 2021)

• Record Type: Journal Article
• Authors: Purgat, Pavel; Shah, Samad; van der Blij, Nils; Qin, Zian; Bauer, Pavol
• Is Part Of: IET power electronics. Volume 14:Issue 7(2021)
• Page Start: 1284
• Page End: 1299
• Publication Date: 2021-04-06
• Subjects: Power electronics -- Periodicals; 621.31705
• DOI: 10.1049/pel2.12089
• Languages: English
• ISSNs: 1755-4535

Abstract

Abstract: Solid‐state circuit breakers (SSCB) show great promise to become the key element in the protection of low‐voltage direct current microgrids. SSCBs operate in the microsecond range and employ semi‐conductor devices that have strict safe operation area limits. Therefore, the design of the SSCB needs to consider the effects of fault detection delays and semi‐conductor safe operation area limitations. This paper derives SSCB design criteria that consider the effect of different detection methods with different detection delays under varying system constraints. The design space is investigated in a sensitivity analysis, which provides insights into the operation boundaries of SSCB and explains how a combination of fault detection methods can reduce the SSCB size. The insights from the theoretical and sensitivity analysis are used to propose an SSCB design flowchart. SSCB prototype is developed and tested in different scenarios under nominal grid voltage and current. The derived design constraints can be used for efficient SSCB design and also to evaluate the effects of different protection schemes on the required SSCB size.