Experimental verification for improved phase‐disposition PWM of three‐phase five‐level diode‐clamped inverter. (28th February 2021)

• Record Type: Journal Article
• Authors: Suleiman, Mohammad; Elnady, A.; Osman, Ahmed
• Is Part Of: International journal of circuit theory and applications. Volume 49:Number 6(2021)
• Page Start: 1828
• Page End: 1848
• Publication Date: 2021-02-28
• Subjects: diode‐clamped inverter -- drive circuit -- multilevel inverter -- switching modulation circuit; Electric circuit analysis -- Periodicals; 621.319205
• DOI: 10.1002/cta.2963
• Languages: English
• ISSNs: 0098-9886

Abstract

Summary: This paper focuses on the design and practical implementation of the effective and improved switching modulation and filter circuits for a three‐phase five‐level diode‐clamped inverter. The proposed switching modulation circuits illustrate the three‐phase control signals, carrier signals, and signals for drive circuits. The paper presents also an efficient control and drive circuits, which are used to operate the power switches (power MOSFETs). An improved analog dead‐band circuit is practically analyzed and implemented to minimize the overlapping periods of any two complement power switches and consequently reduce the noise/spikes caused by those overlapping periods. The proposed improved switching modulation circuit is verified by simulation results along with their analogous experimental results for the switching modulation, control circuits, and power circuits. Abstract : This paper presents a practical implementation of effective improved switching modulation and filter circuits for a three‐phase five‐level diode‐clamped inverter. The paper also presents an efficient control driving circuit to operate power switches and provide an analog dead‐band switching. Our findings are verified experimentally by examining the performance of the inverter with and without the proposed dead‐band circuit.