Characterization of hierarchical manifold microchannel heat sink arrays under simultaneous background and hotspot heating conditions. (November 2018)

• Record Type: Journal Article
• Authors: Drummond, Kevin P.; Back, Doosan; Sinanis, Michael D.; Janes, David B.; Peroulis, Dimitrios; Weibel, Justin A.; Garimella, Suresh V.
• Is Part Of: International journal of heat and mass transfer. Volume 126(2018)Part A
• Page Start: 1289
• Page End: 1301
• Publication Date: 2018-11
• Subjects: Boiling -- Two-phase flow -- Manifold -- Microchannel -- Hotspot -- HFE-7100; Heat -- Transmission -- Periodicals; Mass transfer -- Periodicals; Chaleur -- Transmission -- Périodiques; Transfert de masse -- Périodiques; Electronic journals; 621.4022
• DOI: 10.1016/j.ijheatmasstransfer.2018.05.127
• Languages: English
• ISSNs: 0017-9310

Abstract

Highlights: A two-phase hierarchical manifold microchannel heat sink is characterized under background and hotspot heating. Background heating is over a 5 mm × 5 mm area; the hotspot is a separate 200 μm × 200 μm heater. High-aspect-ratio intrachip microchannels with 15 to 33 μm widths and 150 to 470 μm depths. Heat sinks with wider channels yield higher heat transfer coefficients, but not the lowest thermal resistance. Background heat fluxes up to 1020 W/cm 2 and hotspots up to 2, 700 W/cm 2 are dissipated using HFE-7100. Abstract: A hierarchical manifold microchannel heat sink array is fabricated and experimentally characterized for uniform heat flux dissipation over a footprint area of 5 mm × 5 mm. A 3 × 3 array of heat sinks is fabricated into the silicon substrate containing the heaters for direct intrachip cooling, eliminating the thermal resistances typically associated with the attachment of a separate heat sink. The heat sinks are fed in parallel using a hierarchical manifold distributor that delivers flow to each of the heat sinks. Each heat sink contains a bank of high-aspect-ratio microchannels; five different channel geometries with nominal widths of 15 μm and 33 μm and nominal depths between 150 μm and 470 μm are tested. The thermal and hydraulic performance of each heat sink array geometry is evaluated using HFE-7100 as the working fluid, for mass fluxes ranging from 600 kg/m 2 s to 2100 kg/m 2 s at a constant inlet temperature of 59 °C. To simulate heat generation from electronics devices, a uniform background heat flux is generated with thin-film serpentine heaters fabricated on the silicon substrate opposite the channels; temperature sensors placed across the substrate provide spatially resolved surface temperature measurements. Experiments are also conducted with simultaneous background and hotspot heat generation; the hotspot heat flux is produced by a discrete 200 μm × 200 μm hotspot heater. Heat fluxes up to 1020 W/cm 2 are dissipated under uniform heating conditions at chip temperatures less than 69 °C above the fluid inlet and at pressure drops less than 120 kPa. Heat sinks with wider channels yield higher wetted-area heat transfer coefficients, but not necessarily the lowest thermal resistance; for a fixed channel depth, samples with narrower channels have increased total wetted areas owing to the smaller fin pitches. During simultaneous background and hotspot heating conditions, background heat fluxes up to 900 W/cm 2 and hotspot fluxes up to 2700 W/cm 2 are dissipated. The hotspot temperature increases linearly with hotspot heat flux; at hotspot heat fluxes of 2700 W/cm 2, the hotspot experiences a temperature rise of 16 °C above the average chip temperature.