An optimization framework for dynamic pipeline management in computing systems. (September 2019)

• Record Type: Journal Article
• Authors: Naqvi, Syed Rameez; Zahid, Anjum; Sawalha, Lina; Naqvi, Syed Saud; Akram, Tallha; Haider, Sajjad Ali; Yelamarthi, Kumar; Jenihhin, Maksim
• Is Part Of: Computers & electrical engineering. Volume 78(2019)
• Page Start: 242
• Page End: 258
• Publication Date: 2019-09
• Subjects: Computer pipelines -- Nonlinear -- Collision avoidance -- Reservation table -- Optimization -- Genetic algorithm; 05B05 -- 46N10 -- 68M07 -- 68M20 -- 90C56; Computer engineering -- Periodicals; Electrical engineering -- Periodicals; Electrical engineering -- Data processing -- Periodicals; Ordinateurs -- Conception et construction -- Périodiques; Électrotechnique -- Périodiques; Électrotechnique -- Informatique -- Périodiques; Computer engineering; Electrical engineering; Electrical engineering -- Data processing; Periodicals; Electronic journals; 621.302854
• DOI: 10.1016/j.compeleceng.2019.07.013
• Languages: English
• ISSNs: 0045-7906

Abstract

Abstract: Dynamic computer pipelines use feedback loops for iterative computation, due to which, data items, while traversing them often collide with one another. These pipelines, therefore, employ specialized mechanisms to detect and avoid such collisions in real-time. Mostly, this is done by deciding when, and when not, to allow newer data items to enter the pipeline. We will show that such decisions may lead to different throughput, and guaranteeing optimal performance is an optimization problem. We begin by building a mathematical model of dynamic pipelines, and make use of genetic algorithm to yield near-optimal throughput. The proposed optimization technique accounts for the hardware overhead, incurred due to the extensions in the pipeline organization, as suggested by itself. Our confidence in the results stems from simulation of 10, 000 dynamic pipeline organizations, and for verification of results, we present hardware implementation of one of those. The proposed framework will specifically be useful in embedded systems for digital signal processing applications.