A congestion-aware routing algorithm for mesh-based platform networks-on-chip. (August 2021)

• Record Type: Journal Article
• Authors: Taherkhani, N.; Akbar, R.; Safaei, F.; Moudi, M.
• Is Part Of: Microelectronics journal. Volume 114(2021)
• Publication Date: 2021-08
• Subjects: Network-on-chip (NoC) -- Adaptive routing algorithms -- Congestion control management -- Congestion information -- Load balancing; Microelectronics -- Periodicals; Microélectronique -- Périodiques; Microelectronics; Electronic journals; Journals - contents and abstracts; Periodicals; 621.3805
• DOI: 10.1016/j.mejo.2021.105145
• Languages: English
• ISSNs: 0959-8324

Abstract

Abstract: In this paper we propose a new congestion-aware routing algorithm. At the First step, this algorithm splits NoC into a number of subnets. Then a global routing algorithm within each subnet and a local routing algorithm between subnets are applied for routing. This issue combines the advantages of local and global algorithms together. This algorithm reduces the average latency of the packets in the system without increasing the power of the system. In the experiment that was conducted under uniform, transpose, and bit-reversal traffics, we found that this algorithm would go into the saturation state later than DyAD, CATRA and ERCA algorithms. In all other three algorithms and also, at all injection rates, our proposed algorithm has reduced the delayed average of 41.1% compared to DyAD, 17.2% compared to CATRA and 9.9% compared to ERCA. In addition, under the SPLASH 2 traffic, we found that package latency has improved by 24%, 17%, and 7% compared to the three DyAD, CATRA and ERCA algorithms respectively.