A 0.13-μm CMOS resonator-based frequency-doubling mechanism for clock recovery in a full-rate 40 Gb/s optical receiver. (August 2021) - Chong, Joseph; Pour, Fariborz Lohrabi; Ha, Dong Sam
Abstract: A clock recovery circuit for a full-rate 40 Gb/s optical receiver is presented. The proposed circuit consists of a frequency doubling block, a mixer-based phase detector, and a 40 GHz voltage-controlled oscillator. The frequency doubling block, consisting of a tuned amplifier and a frequency doubler, adopts the LC-resonator loads, rather than the conventional resistive loads, which realizes operation at 40 GHz clock frequency. The circuit is fabricated in 0.13- μ m CMOS technology. Measurement results indicate that the proposed circuit is able to recover a 40 GHz clock. The recovered clock frequency is at least 1.4 times higher than other competing circuits.