Design of a Single-Electron Memory Operating at Room Temperature. (22nd August 2013)

• Record Type: Journal Article
• Authors: Touati, Amine; Chatbouri, Samir; Adel, Kalboussi
• Other Names: Alfieri G. Academic Editor.; Park K. H. Academic Editor.
• Is Part Of: ISRN nanotechnology. Volume 2013(2013)
• Publication Date: 2013-08-22
• Subjects: Nanotechnology -- Periodicals; Nanotechnology; Nanotechnology; Electronic journals; Periodicals; Electronic journals; 620.5
• DOI: 10.1155/2013/587436
• Languages: English
• ISSNs: 2090-6064

Abstract

Abstract : Single-electronic transistors (SETs) are considered as the attractive component for the next generation of transistors due to their ultrasmall size and low power consumption. Because SETs with single island cannot work at high temperature normally, more researchers begin to carry out research on the SETs with N-dimension multi-islands. In this paper, we introduce a new architecture of single-electron memory; ideally the memory should operate in combination of SETs with a nanowire of two-dimensional regular array of multiple tunnel junctions (MTJs). This structure is analyzed and studied with Monte Carlo simulator, SIMON. The Coulomb blockade effect and thermionic effect play an important role in carrier conduction in the system at room temperature. Nanowire MTJs are used as an electrometer to sense the memory-node charge. The well-defined parameter in tunnel junction circuits helps to obtain the charging of single electrons in these circuits at room temperature.