Impact of dynamic variability on the operation of CMOS inverter. Issue 19 (1st September 2013)

• Record Type: Journal Article
• Authors: Ioannidis, E.G.; Haendler, S.; Manceau, J.‐P.; Dimitriadis, C.A.; Ghibaudo, G.
• Is Part Of: Electronics letters. Volume 49:Issue 19(2013)
• Page Start: 1214
• Page End: 1216
• Publication Date: 2013-09-01
• Subjects: CMOS memory circuits -- invertors -- SRAM chips; CMOS inverter -- dynamic variability impact -- SRAM cell -- I‐V measurements -- load current -- sweep‐to‐sweep dispersion -- low‐frequency noise -- noise margin reduction; Electronics -- Periodicals; 621.381
• DOI: 10.1049/el.2013.1343
• Languages: English
• ISSNs: 0013-5194

Abstract

Abstract : The impact of dynamic variability due to low‐frequency fluctuations on the operation of CMOS inverters, which constitute the basic component of SRAM cell, is investigated. The experimental methodology to characterise the effect of dynamic variability in a CMOS inverter is first established based on fast I–V measurements of the load current following the application of a ramp input voltage V in ( t ). It is shown that, for small ramp rise times, the load current characteristics I DD ( V in ) exhibit a huge sweep‐to‐sweep dispersion due to low‐frequency noise. The impact of such dynamic variability sources on the inverter's output characteristics V out ( V in ) is finally demonstrated, revealing a 20% noise margin reduction for the smallest inverter cell.